Operating System I/O Hardware


One of the key functions of the App is to manage various I / O devices including mouse, keyboards, touch pad, disk drive, display adapters, USB devices, Bit-mapped screen, LED, i -Analog-to-digital converter, On / off switch, network connection, O / O audio, printers etc.

The I / O system is required to take an I / O request and send it to a virtual device, then pick up any feedback coming from the device and send it to the app. I / O devices can be divided into two categories .

  1. Block devices - Block device is one where the driver communicates by sending all block information. For example, Hard disks, USB cameras, Disk-On-Key etc.
  2. Character devices - A bulletproof device is a device that the driver communicates by sending and receiving single characters (bytes, octets). For example, serial ports, matching ports, sound cards etc.

Device Controls

Device drivers with software modules can be connected to the OS to manage a specific device. The operating system takes help from device drivers to manage all I / O devices.

Device Controller acts as a visual interface between the device and the device driver. I / O units (Keyboard, mouse, printer, etc.) usually have a machine part and an electronic part where the electrical part is called the device controller.

There is always a device controller and device driver for each device to communicate with Operating Systems. Device controller can manage multiple devices. As a visual connector its main function is to convert serial bit streaming into a block of byte, making error correction when needed.

Any device connected to a computer is connected with a plug and socket, and the socket is connected to the device controller. Tracking is an example of connecting CPU, memory, controllers, and I / O devices where the CPUs and device controls all use a standard bus to communicate.

Hdware Input uotput

Synchronized I / O and asynchronous

  • Synchronous I / O - In this program CPU performance waits while I / O continues
  • Asynchronous I / O - I / O continues simultaneously with CPU performance

Communication with I / O devices

The CPU must have a way to transfer data to or from an I / O device. There are three ways to communicate the CPU with a device.

  • Special Instruction I / O
  • Memory Mapped I / O
  • Direct memory access (DMA)

Special Instruction I / O

This uses CPU commands specially designed to control I / O devices. These commands usually allow data to be sent to an I / O device or read from an I / O device.

Memory Mapped I/ O

When using a memory I / O memory, the same address space is shared with memory and I / O devices. The device is connected directly to specific memory locations so that the I / O device can transfer the data block to / memory without passing through the CPU.

While using a memory map, the OS assigns a buffer to the memory and notifies the I / O device to use that buffer to send data to the CPU. The I / O device works in conjunction with the CPU, interrupting the CPU when finished.


The advantage of this method is that all commands that can access memory can be used to trick an I / O device. A memory-based IO is used for high-speed I / O devices such as disks, connectors.

Direct Memory Access (DMA)

Slow-moving devices like keyboards will generate disruption to the main CPU after each byte transmission. If a fast disk-like device produces interruptions by each byte, the operating system will spend most of its time managing these issues. So a standard computer uses direct memory access hardware (DMA) to reduce this high.

Direct Comprehensive Access (DMA) means that the CPU authorizes the I / O module to read from or write to memory without involvement. The DMA module itself controls the exchange of data between large memory and an I / O device. The CPU is only involved at the beginning and end of the transfer and is interrupted only after the transfer of the entire block.

Direct Memory Access requires a special hardware called DMA controller (DMAC) that controls data transfer and resolves system bus access. Administrators are organized with source and location indicators (where they can read / write data), counters to track the number of transferred bytes, and settings, including I / O and memory types, and interrupt CPU cycles.


The application uses DMA Hardware as follows -

  1. The device driver is instructed to transfer disk data to buffer X address.
  2. The device driver then instructs the disk controller to transfer data to the transmitter.
  3. Disk controller initiates DMA transfer.
  4. The disk controller sends each byte to the DMA controller.
  5. The DMA controller transmits bytes to the buffer, increases the memory address, reduces counter C to C to zero.
  6. When C becomes zero, DMA disrupts the CPU to signal transmission.

Polling vs I / O Disruption

The computer must have access to any kind of input. There are two ways this can happen, known as voting and disruption. Both of these strategies allow the processor to deal with events that may occur at any time and are not related to the current process.

Polling I / O

Voting is an easy way for an I / O device to communicate with a processor. The process of checking the status of a device from time to time to see if it is time for the next I / O operation, is called voting. The I / O device simply enters the data in the Status register, and the processor must receive the information.

Most of the time, the devices will not need attention and if someone does that they will have to wait until they are questioned about the voting system. This method does not work well and most of the processor's time is spent on unnecessary polls.

Compare this method with a teacher who keeps asking every student in the class, in turn, if they need help. Obviously the most effective way is for the student to let the teacher know whenever he or she needs help.

Interrupts the I / O

Another plan to deal with I / O is the way it is driven by distraction. Disruption is a microprocessor signal from a device that needs attention.

The device controller sets the interference signal on the bus when it needs CPU attention when the CPU detects interference, Save its current state and prompts the appropriate interference handle using the interference vector (OS router addresses to handle various events). When interrupted, the CPU continues its original function as if it had never been interrupted.

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